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. . Second-Generation Imaging System IC for High-Speed Digital Still Cameras Supports "Exmor R"*1 CXD4122GG Sony is committed to bringing to even more people the high-speed imaging world*2 with high-speed imaging for selecting a single instant and high-speed video that captures motion that otherwise could not be seen. Towards this end, Sony has now developed the CXD4122GG, a second-generation camera system IC for digital still cameras that achieves power savings and reduces total system costs. The CXD4122GG supports the IMX050CQK*3 back-illuminated CMOS image sensor, allowing Sony to provide the IMX050CQK and CXD4122GG combination as the best solution for high-speed camera systems. *1 "Exmor R" is a Sony's back-illuminated CMOS image sensor. See the Featuring section in this issue for more information. *2 See the Featuring section in CX-News Vol. 55. *3 The IMX050CQK is introduced in the New Products section in this issue.

CXD4122GG . . ■ Achieving high-speed imaging and high-speed video - High-speed imaging of 10M-pixel images at 50 frame/s - High-speed video at 240 to 1000 frame/s ■ Reduced chip size ■ Reduced memory power consumption ■ Reduced memory costs The CXD4122GG is a second-generation camera system IC developed for use with Sony high-speed CMOS image sensors. The CXD4122GG promotes the high-speed imaging world by achieving lower power consumption and lower system costs while maintaining the high-speed performance of systems*4 provided by the first generation IC. *4 Systems consisting of the CXD4109AGG and a Sony high-speed CMOS image sensor.     Achieving High-Speed Imaging and High-Speed Video In the high-speed performance for high-speed imaging and high-speed video areas, the CXD4122GG achieves the same or higher performance as systems using the first-generation IC. When combined with an IMX050CQK, the CXD4122GG supports capture of 10M-pixel still images at 50 frame/s and video imaging at up to 1000 frame/s. (See table 1.) Reduced Chip Size By optimizing the circuit structures used for imaging processing and the image bus architecture and by increasing the density of the cell library and analog macros, Sony achieved a significant reduction in chip size compared to the first generation IC, even though the same 90 nm CMOS fabrication process was used. (See figure 2.) This also achieved a reduction in IC power consumption. Reduced Memory Power Consumption The first-generation IC used DDR2-SDRAM for external memory and power consumption was a significant issue. In this second-generation system IC, however, memory bus bandwidth utilization efficiency has been increased from 56% to over 70%. This makes it possible to reduce the memory connection speed from DDR533 to DDR333, and as a result the CXD4122GG can support the use of LPDDR-SDRAM and DDR2-SDRAM without terminating resistors. When LPDDR-SDRAM is used, this achieves a reduction in system power consumption to one half or less of that required by first-generation systems. (See table 2.) Reduced Memory Costs To support high-speed signal-processing, the first-generation system required DDR2- SDRAM as dedicated image-processing memory and a separate SDRAM for program memory. In the second-generation system, however, Sony has succeeded in sharing external memory for both programs and image data by revising the image bus architecture and improving the image bus utilization efficiency. Compared to the first-generation system, memory costs are reduced since a SDRAM for program memory is no longer required. (See figure 2.)     •••• Mr. Komoto and Mr.Sato and Member of related divisions •••• Software development became extremely difficult due to our taking on the enormous challenge of sharing program and image SDRAM in the CXD4122GG. The software developers and the hardware developers worked hand in hand and we were all relieved when we made it safely to the mass production stage. See all articles with figures and tables. Vol.59

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