 Superb Multipath Performance |
|
In satellite broadcast reception, in
environments, such as apartment complexes,
where signal lines are long and the wiring
complicated, reflected waves occur almost
everywhere and thus many diverse multipath
environment exist.
The CXD2816R achieves the industry’s top
level of equalization performance and can
hold problems to a minimum in communal
reception environments. Figure 2 shows
examples of multipath and figure 3 shows the
CXD2816R’s resistance to multipath. |
| Built-in IQ Imbalance Correction
Circuit |
|
An IQ imbalance can result in incompleteness
in the 90° phase shifter used by the RF IC
quadrature demodulator and differences in the
path lengths between the I and Q channels.
This IC includes an IQ imbalance correction circuit and can automatically correct phase
and amplitude errors in RF IC I and Q
channels. This can also support substrate
pattern optimization to minimize the board
area required for RF IC connection. |
Phase Noise Canceller
|
|
Phase noise increases during rain and due
to performance degradation over time of the
parabolic antenna used and can have severe
adverse influences on reception performance.
In particular, antenna degradation over time
is the most common cause of problems in
satellite broadcast reception.
This IC adopts a newly-developed architecture
and improves the robustness of performance
in environments with phase noise. Figure 4
shows an example of phase noise and this IC’s
resistance to that noise. |
Capable of Controlling DiSEqC
2.x Compliant Devices
|
|
DiSEqC is a widely adopted protocol for
controlling parabolic antennas, switches, and
other devices connected to the digital satellite
broadcast set top box by coaxial cable.
The CXD2816R can control devices that
conform to this standard. |
Achieves High-Speed Sync
Acquisition for the DVB-S Standard
|
|
In this development effort, we aimed at
increasing the speed of sync acquisition
for DVB-S, which is a lower symbol rate
broadcast standard.
Although 80 ms was required for sync
acquisition in previous devices, we were able
to achieve a high-speed sync acquisition time of just 16 ms by adopting new algorithms.
Also, by handling broadcast waveforms that
have a large frequency offset, this device
achieves stable, high-speed sync acquisition
even in degraded signal environments. This
contributes to rapid channel switching in
TV sets. |
Low Power Consumption
|
|
For the DVB-S2 standard, we reduced the
amount of RAM and control the operating
timing according to the noise conditions in the
circuits in the LDPC decoding block, efforts
that required extremely high-level design
technologies. As a result, we achieved smaller
circuits and lower power consumption.
This IC achieves the low power consumption
of 380 mW (typ.) during DVB-S2 reception
and 220 mW (typ.) during DVB-S reception.
This means that end product thermal design
is easier, a heat sync is no longer required,
and the device is appropriate for on-board
designs. It is provided in an 80-pin LQFP
package with a size of 12 × 12 mm. |
DVB-S2/S Standard Digital Satellite Broadcast
Demodulator IC Achieves the Industry‘s Top level
of Performance and Low Power Consumption
Vol.58