SiGe BiCMOS Mixed-Signal
Process Supports RF |
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| Over the years, Sony
has been developing device and circuit technologies
for analog signal processing. Now, Sony provides
a 0.25 μm SiGe BiCMOS process technology
that includes SiGe HBT (silicon-germanium heterojunction
bipolar transistor) devices and that achieves
superlative performance in the RF region as
a new solution for mixed-signal applications.
(See figure 1.) Adoption of this new process
technology allows Sony to provide products that
support high-frequency systems and that achieve
not only low noise and low power, but low cost
as well. TMS2 is based on the "ASC-6" 0.25 μm
CMOS logic process, and can be used to fabricate
ICs that integrate SiGe HBT devices, CMOS devices
that can be used in both RF and analog designs,
and a rich set of options that realize RF circuits
on a chip. (See figure 2.) |
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SiGe HBT Technology
Features High Speed, Low Noise, and Low Power |
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The SiGe HBT is a
bipolar transistor that adopts a thin SiGe epitaxial
layer that provides a heterojunction effect
in the base region of the device. This technology
can implement transistors that feature a higher
cutoff frequency, fT,
and a higher maximum operating frequency, fmax,
than conventional Si bipolar technologies. The
base resistance is reduced, thus lowering noise,
by adopting a cobalt silicide layer (an alloy
of cobalt (Co) and silicon (Si)) in the transistor's
base electrode.
Furthermore, since excellent high-frequency
characteristics can be obtained at low supply
voltages and low current densities, these devices
can contribute to lower power as well. (See
figure 3.) |
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Extensive Analog
Options for RF Products with Superb Performance |
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| The TMS2 process allows
an extensive set of optional devices to be integrated
on the same chip, including high quality factor
(Q) passive devices with excellent reliability
at high frequencies. This allows the TMS2 process
to implement high-functionality analog/digital
mixed-signal front end SOC (System on a Chip)
products. In particular, high-frequency circuits
such as low-noise amplifiers (LNA), voltage-controlled
oscillators (VCO), frequency mixers, and power
amplifiers (PA) can be integrated together on
the same chip. This allows parts counts to be
reduced and flexible and revolutionary architectures
to be adopted. (See table 1 and figure 4.) |
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TMS2 Application
Products |
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| Sony is now taking
advantage of the high frequency, low noise,
and low power features of the TMS2 process by
developing products using this process. These
products include Global Positioning System (GPS),
cellular phone transceiver, wireless LAN (W-LAN),
and TV tuner devices. Of these products, this
article introduces the CXA3355ER GPS RF IC.
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CXA3355ER GPS
RF IC Achieves High Sensitivity and Low Power |
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Sony has already developed
the industry's first single-chip CMOS GPS device*,
and that product is now being mass produced.
However, Sony has now developed a GPS RF IC
that uses the TMS2 technology. This article
presents this new device.
As shown in figure 5, GPS applications are not
limited to automotive products, rather, the
areas where GPS is being adopted are expanding
continually and now include notebook personal
computers, digital cameras, and cellular phones.
This growth is leading to changes in the characteristics
required of GPS devices. For example, higher
sensitivity and lower power are not required
in automotive applications, but are strongly
desired in portable equipment. The CXA3355ER
GPS RF IC combines bipolar technologies, an
area where Sony is particularly strong, with
the analog CMOS design technology nurtured during
the development of Sony's CMOS GPS SoC products.
This combination allows the CXA3355ER to achieve
at the same time both the ultralow power optimal
for portable equipment and higher sensitivity
due to integrating an LNA on the same chip.
*: See CX-News Volume 33 for
details. |
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LNA and Mixer
Circuits |
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| The TMS2 SiGe HBT
allows products fabricated in this process to
include a low-noise amplifier (LNA) circuit.
In conventional bipolar processes, an LNA would
draw several tens of mA, but the LNA circuit
integrated in the CXA3355ER only requires a
mere 2 mA. Furthermore, the noise figure (NF)
is the extremely low 2.0 dB (typical) at 50Ω
matching. The newly developed image rejection
mixer circuit allows the CXA3355ER to achieve
an image rejection ratio of 40 dB over a wide
bandwidth. The CXA3355ER adopts single conversion,
a simple circuit structure. Until now, the degree
of image rejection has been a serious issue
for single conversion circuits. However, by
combining the small relative variations of the
TMS2 process with Sony's advanced circuit design
technologies, Sony was able to integrate image
rejection functionality with a high rejection
ratio on the same chip. |
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VCO and PLL Circuits |
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| The VCO is implemented
using on-chip inductors and varactors. The high
quality factor (Q) of the inductors fabricated
in the TMS2 process minimizes current consumption.
Sony's circuit design know-how developed over
the years provided workarounds for sample-to-sample
variations, which are often a problem in VCO
circuits. The effectiveness of these workarounds
has already been proven. A pulse swallow integer-divisor
type PLL circuit was adopted. Conventional GPS
RF circuits use 16.368 and 18.414 MHz TCXO frequencies,
and the PLL divisor is fixed. While the comparison
frequency must be reduced to handle the 13 MHz
or 19.8 MHz TCXO frequencies used in cellular
phone applications, the VCO current increases
if attempts are made to suppress phase noise.
Current increases are minimized by using high-performance
RF passive devices in the tank circuit. Furthermore,
high-speed bipolar and CMOS devices are used
where appropriate in the pulse swallow frequency
divider to further reduce current consumption.
The adoption of the TMS2 process has thus made
lower power and further miniaturization possible. |
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Interface and
Control |
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| This device supports
a 1-bit digital output, making connection with
the baseband system easier and at the same time
obviates the need for a buffer amplifier at
the DSP input. Furthermore, the CXA3355ER includes
a control block fabricated in CMOS that not
only controls the PLL and filter settings, but
also can set up tests. Fabricating this block
in CMOS minimizes the increase in chip area
required for these functions. All the blocks
in the IC can be controlled from this tiny control
circuit. TMS2 is also a superlative process
for analog CMOS. Fully half of this IC's analog
block is implemented using CMOS circuits. The
CXA3355ER GPS RF IC combines both SiGe HBT and
CMOS devices on the same chip and takes maximum
advantage of both the high potential of the
TMS2 process technology and Sony's superlative
circuit technologies, making it a highly competitive
product. |
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Future Developments |
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| Sony is now working
on developing a 0.25 μm SiGeC BiCMOS technology
that adds carbon (C) to the TMS2 base layer.
Sony is also developing, among other processes,
a 0.25 μm RF CMOS technology that includes
both 6 V breakdown voltage CMOS and MONOS trimming
technologies while removing SiGe HBT fabrication
from the TMS2 process. All these efforts are
aimed at expanding the range of process technologies
Sony has available and to allow Sony to provide
a wide range of device solutions for the RF
area. Keep your eye on Sony's mixed-signal device
technologies for even more exciting developments. |
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See
all articles with figures and tables.  |
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Vol.35 |
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